What is PCI Express used for?

PCIExpress interface

PCI Express (hereafter referred to as PCI-E) adopts the popular point-to-point serial connection in the industry. Compared with the shared parallel architecture of PCI and earlier computer bus, each device has its own dedicated connection and does not need to request the entire bus. Bandwidth, and can increase the data transmission rate to a very high frequency, reaching the high bandwidth that PCI can't provide. Compared to the traditional PCI bus, which can only achieve one-way transmission in a single time period, the PCI-E dual simplex connection can provide higher transmission rate and quality, and the difference between them is similar to half-duplex and full-duplex.

Interpretation

PCI Express is a new generation of bus interface, and graphics cards using such interfaces have been officially launched in 2004. As early as the "Intel Developer Forum" in the spring of 2001, Intel proposed to replace the internal connection of the PCI bus and various chips with a new generation of technology, and called it the third generation I/O bus technology. Then at the end of 2001, more than 20 industry-leading companies including Intel, AMD, DELL, and IBM began drafting specifications for new technologies, which were completed in 2002 and officially named PCI Express.

Introduction

The PCI-E interface varies depending on the bus width, including X1, X4, X8, and X16, while the X2 mode will be used for the internal interface instead of the slot mode. The PCI-E specification is connected from one channel to 32 channels and has very strong scalability to meet the different data transmission bandwidth requirements of different system devices. In addition, the shorter PCI-E card can be inserted into the longer PCI-E slot, and the PCI-E interface can also support hot plugging, which is also a big leap. The PCI-E X1's 250MB/sec transmission speed can meet the data transmission bandwidth requirements of mainstream audio chips, network card chips and storage devices, but it is far from meeting the demand for data transmission bandwidth of graphics chips. Therefore, the PCI-E interface used to replace the AGP interface has a bit width of X16, which can provide 5 GB/s of bandwidth, and can provide an actual bandwidth of about 4 GB/s even if there is loss in coding, far exceeding AGP 8X. The bandwidth of 2.1GB/s.
Although the PCI-E specification allows for X1 (250MB/sec), X2, X4, X8, X16 and X32 channel specifications, PCI-E X1 and PCI-E X16 have become PCI-E mainstream specifications by form. At the same time, many chipset manufacturers added support for PCI-E X1 in the South Bridge chip, and added support for PCI-E X16 in the Northbridge chip. In addition to providing extremely high data transfer bandwidth, PCI-E delivers data in serial packets, so each pin of the PCI-E interface can achieve more bandwidth than traditional I/O standards, thus reducing PCI- E equipment production cost and volume. In addition, PCI-E also supports high-end power management, supports hot swap, supports data synchronous transmission, and optimizes bandwidth for priority transmission of data.

Compatibility

PCI-E is compatible with PCI technology and devices at the software level. It supports the initialization of PCI devices and memory modules. That is to say, the past drivers and operating systems can support PCI-E devices without reintroducing them. PCI-E has become the mainstream of graphics interface, but some chipsets have provided PCI-E as the graphics interface in the early days, but the speed is 4X instead of 16X, such as VIA PT880 Pro and VIA PT880 Ultra. Extremely rare

Development

In the spring of 2001, Intel officially announced PCI Express on the IDF, which is the third generation I\O technology that replaces the PCI bus, also known as 3GIO. The bus specification is developed by the Intel-backed AWG (Arapahoe Working Group). On April 17, 2002, the AWG officially announced the drafting of the 3GIO 1.0 specification and handed it over to the PCI-SIG for review. At the beginning, everyone thought it would be named Serial PCI (affected by Serial ATA), but in the end it was officially named PCI Express. Spec2.0 (2.0 specification) was officially launched in 2006.
The evolution process of PCI Express bus technology is actually the process of computing system I\O interface rate evolution. The PCI bus is a 33MHz@32bit or 66MHz@64bit parallel bus with a bus bandwidth of 133MB/s to a maximum of 533MB/s. All devices connected to the PCI bus share 133MB/s to 533MB/s bandwidth. This kind of bus is used to deal with the sound card, 10/100M network card and USB 1.1 and other network interfaces are basically no problem. With the further development of computer and communication technologies, a new generation of I\O interfaces have emerged, such as Gigabit (GE), 10 Gigabit (10GE) Ethernet technology, and 4G/8G FC technology, making the bandwidth of the PCI bus already available. Incapable of coping with the requirements of a large number of high-bandwidth parallel reads and writes within the computing system, the PCI bus has also become a bottleneck for system performance improvement, and the PCI Express bus has appeared. PCI Express bus technology has become a common application in today's next-generation storage systems. The PCI Express bus provides extremely high bandwidth to meet the needs of the system.
The PCI-E 3.0 specification has also been determined that its encoded data rate is doubled compared to the PCI-E 2.0 specification under the same conditions, and the bidirectional rate of the X32 port is as high as 320 Gbps.

Disadvantage

The biggest advantage of the PCI bus is that the bus structure is simple, the cost is low, and the design is simple, but the disadvantages are also obvious:
1) Parallel bus can't connect too many devices, bus scalability is poor, and inter-line interference will cause the system to work normally;
2) When multiple devices are connected, the effective bandwidth of the bus will be greatly reduced and the transmission rate will be slower;
3) In order to reduce costs and minimize mutual interference, it is necessary to reduce the bus bandwidth, or the address bus and data bus are designed in a multiplexed manner, which reduces bandwidth utilization. The PCI Express bus is a high performance, general purpose I\O interconnect bus defined for future computer and communication platforms.

Comparison

Compared with the PCI bus, the PCI Express bus has the following technical advantages:
1) It is a serial bus that performs point-to-point transmission, and each transmission channel has exclusive bandwidth.
2) The PCI Express bus supports bidirectional transfer mode and data subchannel transfer mode. Among them, the data sub-channel transmission mode is the PCI Express bus x1, x2, x4, x8, x12, x16 and x32 multi-channel connection, the x1 unidirectional transmission bandwidth can reach 250MB/s, and the bidirectional transmission bandwidth can reach 500MB/s. This is no longer comparable to the normal PCI bus.
3) The PCI Express bus leverages advanced point-to-point interconnects, switch-based technologies, and packet-based protocols to implement new bus performance and features. Power management, quality of service (QoS), hot-swap support, data integrity, error handling mechanisms, and more are also advanced features supported by the PCI Express bus.
4) Good inheritance with the PCI bus to maintain software inheritance and reliability. The key PCI features of the PCI Express bus, such as application models, storage structures, software interfaces, etc., are consistent with traditional PCI buses, but the parallel PCI bus is replaced by a highly scalable, fully serial bus.
5) PCI Express bus makes full use of advanced point-to-point interconnection, which reduces the complexity and difficulty of system hardware platform design, which greatly reduces the development and manufacturing design cost of the system and greatly improves the cost performance and robustness of the system. As can be seen from the table below, the system bus bandwidth is increased while reducing the number of hardware PINs, and the cost of hardware is directly reduced.
PCI Express interface mode is usually used for graphics card, etc., motherboard type interface card.

Condition

The motherboard must have a dedicated PCI Express slot.

Advantage

- PCI-Express is more productive than PCI and AGP slots.
- Higher measurability than the PCI bus.
- Capable of meeting the bandwidth requirements of hard disk controllers, Gigabit NICs and other peripherals with high bandwidth requirements.
- It is not possible to provide a large amount of bandwidth required for graphics upgrades required in future games like AGP 4x and 8x, but this status is expected to be changed by PCI-Express x16 around 2006.
- Unless you have a Gigabit NIC or other peripherals that require a lot of bandwidth, PCI Express technology is not the only option, because PCI and AGP technology can still meet the bandwidth requirements of midrange computers.
- PCI-Express technology, version and driver are still in their infancy, and will be upgraded regularly, in other words, the space for this technology is still very large.
If you want to upgrade your computer system, PCI Express technology should definitely be considered. But if all you need is top-level graphics visuals, then there is no need to replace the motherboard with AGP 4x or AGP 8x technology with a motherboard with PCI Express, because the latter still has enough ability to provide mainstream-like The bandwidth required for games like DOOM 3. For now, PCI and AGP technologies are still sufficient for the majority of computer users.
However, after the waves of the Yangtze River push forward, the new PCI Express technology will gradually replace these two technologies in the future computer field.

Application

In the latest generation of storage products IX3000 developed by H3C, Intel's latest generation server hardware platform technology is adopted. The front end supports up to 16 GE interfaces, or 8 GE+8 4Gb FC interfaces. The maximum configuration can support up to 4 10GEs. The interface, back-end interface can provide six SAS × 4 wide ports, 72 Gbps back-end access rate, providing unparalleled disk access IOPS and throughput, only PCI Express bus architecture systems can meet system performance requirements.
IX3000 storage system controller system. The system uses four x 8 PCIE buses to expand the front-end and back-end interfaces. Two x 8 PCIE buses are used to implement the cache mirroring between the two controllers. Two x 8 PCIE buses are used as the internal control and management channels. The front-end interface can be equipped with a 10GE interface card or a GE+FC COMBO interface card, and a GE interface card. The back-end PCIE interface is used to connect with a high-performance IO processing expansion card to provide high-performance IO processing, RAID computing, and CACHE image management. Features and provides a SAS back-end interface for connecting SAS disk arrays, giving users unprecedented storage experience.

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